Class hours: Monday and Wednesday 13.15 - 15.00 in room H.204.
Office hours: Mondays 12:00 - 13:00 @ K319 (by appointment)
Instructor | Teaching Assistant(s) |
Vassilis Papaefstathiou | Mr. Sotiris Totomis |
Area: | Hardware and Computer Systems (E4) |
Description: | Performance metrics, pipelining and hazards, dynamic instruction scheduling with scoreboard and Tomasulo, ILP and static instruction scheduling, branch prediction, precise exceptions, speculation, multiple issue out-of-order superscalar processors, VLIW processors, thread level paralellism and multithreaded processors, multi-level cache memories and design optimizations, virtual memory and TLBs, multicore processors, snoop-based cache coherence, memory consistency, DRAM main memory technologies. |
ECTS: | 6 |
Prerequisites: | CS225 Computer Organization |
Grading: |
Homeworks/Assignments: 35% (grade must be > 4.5)
Midterm Exam: 20% (mandatory) Final Exam: 45% (grade must be > 4.5) |
Mailing-list: | hy425-list at csd dot uoc dot gr |
Hennessy and Patterson, Computer Architecture: A Quantitative Approach, 6th Edition/2020. Available in Greek (Klidarithmos Publishers, translation by D. Gizopoulos). ISBN 978-960-645-095-2.
William Stallings, Computer Organization and Architecture: Designing for Performance, 11th Edition/2020. Available in Greek (Tziolas Publishers, translation by M. Roumeliotis). ISBN 978-960-418-892-5.
Additional reading: Shen and Lipasti, Modern Processor Design, Fundamentals of Superscalar Processors, McGraw Hill, 2005, ISBN 0-07-059033-8.
Additional reading material will be posted as needed, during classes. Reading material includes Chapters from other textbooks (in English) and technical papers from conferences or journals covering the field of Computer Architecture.
Date | Description | Material | Deadline |
---|---|---|---|
TBA | Homework 1 | HW | TBA |