CS425: Computer Systems Architecture (Fall 2021)
Department of Computer Science, University of Crete
Schedule
Class hours: Monday and Wednesday 14.15 - 16.00 in room H.204.
Office hours: By Appointment.
Staff
| Instructor(s) | Teaching Assistant(s) |
| Dr. Vassilis Papaefstathiou | Mr. Sotiris Totomis |
| Prof. Manolis Katevenis |
Course Information
| Area: | Hardware and Computer Systems (E4) |
| Description: | Performance metrics, pipelining and hazards, dynamic instruction scheduling with scoreboard and Tomasulo, ILP and static instruction scheduling, branch prediction, precise exceptions, speculation, multiple issue out-of-order superscalar processors, VLIW processors, thread level paralellism and multithreaded processors, multi-level cache memories and design optimizations, virtual memory and TLBs, multicore processors, snoop-based cache coherence, memory consistency, DRAM main memory technologies. |
| ECTS: | 6 |
| Prerequisites: | CS225 Computer Organization |
| Grading: |
Homeworks/Assignments: 35% (grade must be > 4.5)
Midterm Exam: 20% (mandatory) Final Exam: 45% (grade must be > 4.5) |
| Mailing-list: | hy425-list at csd dot uoc dot gr |
Textbooks and Reading Material
Hennessy and Patterson, Computer Architecture: A Quantitative Approach, 6th Edition/2020. Available in Greek (Klidarithmos Publishers, translation by D. Gizopoulos). ISBN 978-960-645-095-2.
William Stallings, Computer Organization and Architecture: Designing for Performance, 11th Edition/2020. Available in Greek (Tziolas Publishers, translation by M. Roumeliotis). ISBN 978-960-418-892-5.
Additional reading: Shen and Lipasti, Modern Processor Design, Fundamentals of Superscalar Processors, McGraw Hill, 2005, ISBN 0-07-059033-8.
Additional reading material will be posted as needed, during classes. Reading material includes Chapters from other textbooks (in English) and technical papers from conferences or journals covering the field of Computer Architecture.
Lectures Schedule and Material
| Date | Description | Material | Reading List |
|---|---|---|---|
| Oct. 04 | Welcome and Introduction | ||
| Oct. 06 | Introduction | Slides | Chapter 1 (1.1 - 1.4) from course textbook |
| Oct. 11 | Metrics | Slides | Chapter 1 (1.5 - 1.13) from course textbook |
| Oct. 18 | Metrics | Slides from Oct. 11 | |
| Oct. 20 | Pipelining Review | Slides | Appendix A (A.1 - A.3) from course textbook |
| Oct. 22 | Pipelining Review | Slides from Oct. 20 | |
| Oct. 25 | Dynamic Instruction Scheduling: Scoreboard | Slides | Section 2.1, Appendix A (A.5, A.7, A.8) from course textbook |
| Oct. 27 | Dynamic Instruction Scheduling: Scoreboard | Slides from Oct. 25 | CDC 6600 original scoreboard design paper |
| Nov. 01 | Dynamic Instruction Scheduling: Tomasulo | Slides | Chapter 2 (2.4, 2.5) from course textbook |
| Nov. 03 | Dynamic Instruction Scheduling: Tomasulo | Slides from Nov. 01 | Tomasulo's original paper |
| Nov. 08 | Static Instruction Scheduling | Slides | Section 2.2, Appendix G (G.1 - G.3) from course textbook |
| Nov. 10 | Branch Prediction | Slides | Sections 2.3, 2.9 (pages 121-126), Appendix G (G.4) from course textbook. |
| Nov. 15 | Branch Prediction | Slides from Nov. 10 |
1. Alternative implementations of two-level adaptive branch predictors
2. Combining branch predictors |
| Nov. 22 | Branch Prediction | Slides from Nov. 10 | |
| Nov. 24 | Solutions for Homework 1 and Midterm Recap (S. Totomis) | Homework 1 | |
| Nov. 29 | Midterm Examination (mandatory 20%) | All lectures up to Branch Prediction (inclusive) | |
| Dec. 01 | Reorder Buffer, Precise Exceptions and Speculation | Slides | Appendix A (A.4), Section 2.6, Section 2.9 (pages 127-129) from course textbook |
| Dec. 03 | Presentation of Programming Assignment 1 (S. Totomis) | Programming Assignment 1 | |
| Dec. 06 | Reorder Buffer, Precise Exceptions and Speculation | Slides from Dec. 01 | Implementing Precise Interrupts in Pipelined Processors (+ Future File) |
| Dec. 08 | Multiple Issue Processors: Superscalar and VLIW | Slides | Sections 2.7, 2.8, Appendix G.3 (G-19 to G-21), Appendix G.6 |
| Dec. 15 | Multiple Issue Processors: Superscalar and VLIW | Slides from Dec. 08 | Limits of Instruction-Level Parallelism |
| Dec. 17 | Thread-Level Parallelism (TLP) | Slides | Sections 3.5, 3.6 |
| Dec. 20 | Vector Processors | Slides | |
| Dec. 22 | Graphics Processing Units - GPUs | Slides | |
| Jan. 10 | Cache memories: Design and performance analysis | Slides | Section 5.1, Appendix C.1 |
| Jan. 12 | Cache design optimizations | Slides | Section 5.2, Appendix C.2 |
| Jan. 14 | Cache design optimizations | Slides from Jan. 12 | |
| Feb. 01 | Final Examination (mandatory 45%) | Tuesday, February 1st 2022: 16.00 - 19.00 @ Amph. B |
Websites from Previous Years
- Fall 2020 (taught by V. Papaefstathiou)
- Fall 2019 (taught by V. Papaefstathiou)
- Fall 2018 (taught by V. Papaefstathiou)
- Fall 2017 (taught by V. Papaefstathiou)
- Fall 2016 (taught by V. Papaefstathiou and I. Mavroidis)
- Fall 2015 (taught by I. Mavroidis)
- Fall 2014 (taught by I. Mavroidis)
- Fall 2013 (taught by C. Sotiriou and I. Mavroidis)
- Fall 2012 (taught by C. Sotiriou and I. Mavroidis)
- Fall 2011 (taught by D. Nikolopoulos)
- Fall 2008
- Spring 2008
- Spring 2002 (taught by C. Sotiriou)