CS425: Computer Systems Architecture (Fall 2023)

Department of Computer Science, University of Crete

Schedule

Class hours: Monday and Wednesday 14.15 - 16.00 in room H.204.

Office hours: Mondays 13:00 - 14:00 @ K319 (by appointment)

Staff

Instructor Teaching Assistant(s)
Vassilis Papaefstathiou Mr. Sotiris Totomis

Course Information

Area: Hardware and Computer Systems (E4)
Description: Performance metrics, pipelining and hazards, dynamic instruction scheduling with scoreboard and Tomasulo, ILP and static instruction scheduling, branch prediction, precise exceptions, speculation, multiple issue out-of-order superscalar processors, VLIW processors, thread level paralellism and multithreaded processors, multi-level cache memories and design optimizations, virtual memory and TLBs, multicore processors, snoop-based cache coherence, memory consistency, DRAM main memory technologies.
ECTS: 6
Prerequisites: CS225 Computer Organization
Grading: Homeworks/Assignments: 35% (grade must be > 4.5)
Midterm Exam: 20% (mandatory)
Final Exam: 45% (grade must be > 4.5)
Mailing-list: hy425-list at csd dot uoc dot gr

Textbooks and Reading Material

Computer Architecture, A Quantitative Approach

Hennessy and Patterson, Computer Architecture: A Quantitative Approach, 6th Edition/2020. Available in Greek (Klidarithmos Publishers, translation by D. Gizopoulos). ISBN 978-960-645-095-2.

[Eudoxus Link]

[Book Page]

Computer Architecture, A Quantitative Approach

William Stallings, Computer Organization and Architecture: Designing for Performance, 11th Edition/2020. Available in Greek (Tziolas Publishers, translation by M. Roumeliotis). ISBN 978-960-418-892-5.

[Eudoxus Link]

[Book Page]

Additional reading: Shen and Lipasti, Modern Processor Design, Fundamentals of Superscalar Processors, McGraw Hill, 2005, ISBN 0-07-059033-8.

Additional reading material will be posted as needed, during classes. Reading material includes Chapters from other textbooks (in English) and technical papers from conferences or journals covering the field of Computer Architecture.

Lectures Schedule and Material

Date Description Material Reading List
Sep. 25 Welcome and Introduction
Sep. 27 Introduction Slides Chapter 1 (1.1 - 1.4) from textbook
Oct. 02 Metrics Slides Chapter 1 (1.5 - 1.13) from textbook
Oct. 04 Metrics Slides from Oct. 02
Oct. 09 Metrics Slides from Oct. 02
Oct. 11 Pipelining Review Slides Appendix C (C.1 - C.4) from textbook
Oct. 16 Pipelining Review Slides from Oct. 11
Oct. 18 Dynamic Instruction Scheduling: Scoreboard Slides Chapter 3 (3.1 - 3.2) & Appendix C (C.5 - C.10) from textbook
Oct. 23 Dynamic Instruction Scheduling: Scoreboard Slides from Oct. 18 CDC 6600 original scoreboard design paper
Oct. 25 Dynamic Instruction Scheduling: Tomasulo Slides Chapter 3 (3.4 - 3.5) from textbook
Oct. 27 Dynamic Instruction Scheduling: Tomasulo Slides from Oct. 25 Tomasulo's original paper
Oct. 30 Static Instruction Scheduling Slides Chapter 3 (3.2) & Chapter 4 (4.5) from textbook
Nov. 01 Static Instruction Scheduling Slides from Oct. 30
Nov. 03 Branch Prediction Slides Chapter 3 (3.3 & 3.9) & Appendix C (C.2) from textbook
Nov. 06 Branch Prediction Slides from Nov. 03 1. Alternative implementations of two-level adaptive branch predictors
2. Combining branch predictors
Nov. 08 Reorder Buffer, Precise Exceptions and Speculation Slides Chapter 3 (3.6) from textbook
Nov. 13 Reorder Buffer, Precise Exceptions and Speculation Slides from Nov. 08 Implementing Precise Interrupts in Pipelined Processors (+ Future File)
Nov. 15 Multiple Issue Processors: Superscalar and VLIW Slides Chapter 3 (3.7 - 3.10) from textbook
Nov. 20 Multiple Issue Processors: Superscalar and VLIW Slides from Nov. 15 Limits of Instruction-Level Parallelism
Nov. 22 Midterm Examination (mandatory 20%) All lectures up to Branch Prediction (inclusive)
Nov. 27 Thread-Level Parallelism (TLP) Slides Chapter 3 (3.11) from textbook
Nov. 29 Prog. Assignment 1 + Solutions for Homework 1 & 2 (S. Totomis) Programming Assignment 1 Homework 1 Homework 2
Dec. 01 Vector Processors Slides Chapter 4 (4.1 - 4.2) from textbook
Dec. 04 Vector Processors Slides from Dec. 01
Dec. 06 Graphics Processing Units - GPUs Slides Chapter 4 (4.4) from textbook
Dec. 08 Graphics Processing Units - GPUs Slides from Dec. 06
Dec. 11 Cache memories: Design and performance analysis Slides Appendix B (B.1 - B.2) from textbook
Dec. 13 Cache memories: Design and performance analysis Slides from Dec. 11
Dec. 15 Cache design optimizations Slides Chapter 2 (2.1, 2.3) from textbook
Dec. 18 Cache design optimizations Slides from Dec. 15
Dec. 20 Cache design optimizations Slides from Dec. 15
Jan. 17 Final Examination (mandatory 45%) Wednesday, January 17th 2024: 09.30 - 12.30 @ Amph. A

Homeworks and Assignments

Date Description Material Deadline
Oct. 25 Homework 1 HW Nov. 06, 23:59
Nov. 13 Homework 2 HW Nov. 24, 23:59
Nov. 27 Programming Assignment 1 PA Dec. 11, 23:59
Dec. 08 Programming Assignment 2 PA Dec. 22, 23:59
Dec. 22 Programming Assignment 3 PA Jan. 29 2024, 23:59

Websites from Previous Years

Last update: 15 Jan. 2024 - by V. Papaefstathiou